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project:chipwhisperer:start [2019/11/23 20:06] – [Glitching STM32 external board through UFO-board interface] 7.37 MHz vs 8 MHz abyssalproject:chipwhisperer:start [2019/12/15 22:12] (current) – [Chipwhisperer STM32 serial protocol] abyssal
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 Unfortunately the [[https://wiki.newae.com/CW308T-STM32F | board templates for STM32 for UFO boards are too small for this chip]], which is not made in the smallest TQFP-64 package. Unfortunately the [[https://wiki.newae.com/CW308T-STM32F | board templates for STM32 for UFO boards are too small for this chip]], which is not made in the smallest TQFP-64 package.
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 FYI: just keep all the relevants part of pinout connected (GPIO4-trigger, RX/TX). Use 7.37 MHz clock instead of 8 MHz clock provided by the crystal oscillator or MCO from STLink so that the UART doesn't break. For anyone wondering why 7.37 MHz instead of 8 MHz, is that 7.3728e6/38400 == 192 and 7.3728e6/115200 == 64 precisely which is why 7.37 MHz is used for "industrial" UART clock generators. The chip will of course let you reconfigure the clock network, but for the usage with Chipwhisperer, using 7.37 Mhz is much easier. FYI: just keep all the relevants part of pinout connected (GPIO4-trigger, RX/TX). Use 7.37 MHz clock instead of 8 MHz clock provided by the crystal oscillator or MCO from STLink so that the UART doesn't break. For anyone wondering why 7.37 MHz instead of 8 MHz, is that 7.3728e6/38400 == 192 and 7.3728e6/115200 == 64 precisely which is why 7.37 MHz is used for "industrial" UART clock generators. The chip will of course let you reconfigure the clock network, but for the usage with Chipwhisperer, using 7.37 Mhz is much easier.
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 +====== STM32CubeMX ======
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 +When you look at the clock networks of various STM32, you will find that each chip has different clock network, STM32F427 cannot be easily replaced with STM32F429.
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 +====== UART bootROM protocol of STM32s via Chipwhisperer ======
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 +Chipwhisperer has [[https://github.com/newaetech/chipwhisperer/blob/develop/software/chipwhisperer/hardware/naeusb/programmer_stm32fserial.py | STM32 serial programmer]] which can do more stuff than just erase and flash new program (refer to AN 3155 and AN 2606 STM32 datasheet).
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 +To get into the bootROM you need to trigger the right pattern (depends on specific STM32, but generally needs BOOT0 pin high with some extra conditions).
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 +Once bootROM is running, you can issue commands like erase, write, protect/unprotect and others.
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 +Some commands can be stacked, e.g. (extended) erase with write, some like (un)protect commands cause system reset of STM32 and you need to reopen the programmer.
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 +An unfortunate side effect of pulling nRST (either from outside or from firmware) is that gdb connected to SWD as external target aborts.
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 +I would highly recommend using logic analyzer to check result since the STM32 programmer is PITA. Order of connection of SWD/JTAG and logic analyzer seems to matter. Once nRST is pulled, SWD/JTAG seems to lose ability to do proper system reset.
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 +{{:project:chipwhisperer:chipwhisperer_nano_stm32f0_bootrom.jpg?800|}}
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project/chipwhisperer/start.1574539598.txt.gz · Last modified: 2019/11/23 20:06 by abyssal